A major aspect of improving vehicle electrification and autonomous driving is the spread of advanced driver assistance systems (ADAS). Today, these systems are rapidly becoming available in almost every vehicle on the market, and this trend will only continue as the technology matures. However, as the technology evolves, the hardware challenges facing ADAS designers become more complex. In this article, we'll cover the hardware needs of ADAS, how FPgas can fill those gaps, and why eFPGA IP will be the next ADAS hardware trend.
Hardware requirements for ADAS
The development of ADAS in modern cars has created some serious challenges for the underlying hardware. In mission-critical applications like ADAS, the most important goal is to ensure the safety of the vehicle's occupants. This goal requires the system to work accurately, reliably, and in real time (i.e., with low latency). At the same time, these systems need to operate at the lowest possible power consumption to preserve battery life and extend the range of Electric vehicles.
Figure 1: ADAS puts a huge strain on computing hardware
Balancing these demands is a huge challenge for ADAS, as systems tend to rely on large amounts of data and computationally intensive tasks such as machine learning algorithms. So the ADAS hardware has to take the data, aggregate it through sensor fusion, run machine learning algorithms, and then take action - all in real time and with the lowest power budget - which is obviously no easy task.
This challenge is further compounded by automotive designers' need for a flexible and scalable hardware platform to meet rapidly evolving specification changes.
Hardware acceleration and FPgas
To address the serious challenges facing ADAS hardware, designers are adopting dedicated hardware accelerators to improve performance instead of traditional CPU-based architectures. Moving away from more conventional computing resources, such as cpus or Gpus, provides better performance and power efficiency for specific applications through dedicated hardware accelerators. Based on this range, the choice is usually somewhere between FPGas, which offer the most flexibility, and ASics, which offer the highest performance.
A key feature of FPgas is the ability of FPGas to provide a high level of parallelism while still being programmed for specific workloads. The results show that FPgas offer significant value in workload acceleration, especially where performance and latency are key. In addition, FPgas can provide the best performance per watt for workloads that require acceleration compared to more conventional CPU and GPU-based systems, helping systems balance the trade-off between performance and power efficiency.
Equally important, FPgas offer advantages over ASics in terms of scalability due to their programmable nature. This adaptability is particularly important in machine learning systems such as ADAS, where the underlying algorithms change rapidly. In addition, the specifications of ASics must be defined years in advance, while FPgas can be updated and reprogrammed in a minute. This capability enables FPGA-based ADAS systems to provide scalability and versatility that ASics simply cannot.
For these reasons and more, there are already more than 250 million FPGas in cars today, more than 75 million of which are used for ADAS applications.
Industry trend: eFPGA for ADAS
Despite the power of hardware acceleration, devices like FPgas and ASics generally still can't operate completely on their own. Today's ADAS solutions need to integrate hardware accelerators with cpus, which are designed to handle many general-purpose and organizational tasks at the system level. It is for this reason that heterogeneous computing platforms, such as heterogeneous SoCs, have become one of the most common among acceleration and ADAS platforms.
Figure 2: eFPGA technologies such as Achronix's Speedcore IP can be tightly coupled to CPU resources
As a result, we believe the next major trend in ADAS computing will be the rise of embedded FPGA (i.e. eFPGA) IP in custom ASics. With eFPGA IP, designers are able to take advantage of FPGA technology while tightly coupling their hardware acceleration with other ASIC subsystems such as CPU and I/O interfaces. By embedding FPgas in custom SOCs alongside cpus, eFPGA IP offers significant cost, power and space savings compared to discrete FPGA solutions.
Specifically, our evaluation shows that eFPGA IP integration can help designers save 90% of costs, reduce power consumption by 75%, improve latency by 100x, and increase interface bandwidth by 10x compared to FPGA-based stand-alone systems. As a result, ADAS will gradually adopt heterogeneous solutions based on eFPGA technology in the near future.
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