To double the life of NAND flash, Altera has developed a memory reference design based on its Arria 10 SoC, which can also increase the number of program-erase cycles by up to 7 times compared to current NAND flash implementations.
The reference design includes the Arria 10 SoC, which has an integrated dual-core ARM CortexA9 processor, uses Mobiveil's solid-state disk (SSD) controller, and NVMdurance's NAND optimization software. It is an optimized, cost-effective single-chip solution . This reference design improves the performance and flexibility of NAND utilization, while reducing the cost of NAND arrays by extending the life of data center equipment.
By using FPGAs with integrated hard processor systems, designers can quickly take advantage of the cost savings of next-generation NAND devices while retaining the flexibility of custom solutions to maximize system performance, durability, and storage capacity. This storage solution implements Mobiveil's Universal NVM Express Controller (UNEX), PCIe-based SSD configurable controller, and NVMdurance's NAND flash optimization software in the Arria 10 SoC, enabling data centers to take advantage of the most advanced 3D NAND Technology without long design cycles The company says that ASIC design is required.
Ravi Thummarukudy, CEO of Mobiveil Inc., said: "Compared to ASIC-based SoC-designed flash memory, FPGA-based storage systems provide hardware offload capabilities and make it easier to perform specification updates. The new Arria 10 SoC with embedded ARM The core, PCI Express Gen3 and DDR4 interfaces, together with our SSD controller and NVMdurance IP, can directly meet the needs of data center architects in NAND storage solutions, thereby increasing power consumption, scalability and total cost of ownership. "
In this reference design, Mobiveil's controller supports a multi-core architecture, allowing threads to run and interrupt on their own queues on each core without any locking. NVMdurance's NAND flash optimization software continuously monitors the status of NAND flash and automatically adjusts control parameters in real time, thereby greatly extending the life of the flash system. The company said that the Altera reference design also features end-to-end data protection, encryption and compression, and optimized throughput and power consumption, all of which take up a small area of silicon.
"Until now, the economic benefits of FPGA flash storage have not been realized," said Robert Pierce, senior marketing manager for Altera's computing and storage business unit. "Our Arria 10 SoC-based solution will enable architects to rethink how to deploy storage in the cloud and high-performance computing systems-opening up new ways to innovate and expand company investment, while providing a way to reduce time to market. Become Competitive Advantage."
